MSI 与 INTx Message是不同的东西
Command: Interrupt Acknowledge for INTR(PIC output) (INTx# inputs)
PIC returns a 8-bit value called the Interrupt Vector
获得VECTOR
SMP, from PIC to IO APIC
APIC bus: send vector to CPU
向SMP发展
xAPIC: Deliver to the Local APICs in the form of memory writes, referered to as MSIs or Message Signaled Interrutps
PCI引入了MSI
PCI interrupts were designed to be level-sensitive and shareable
PIN的属性
Configuration space:
Interrupt Pin: RO access, INTx
Interrupt Line: RW access, IRQ0 - 255
中断相关的寄存器
Int status bit: Status register of the config header
Int Disable bit: Command register of the config header (no effect on MSI)
虚拟INTx
通过发Assert_INTx与Dessert_INTx来实现
INTx Message包括：Assert_INT A, B, C, D, Dessert_INT A, B, C, D
INT MAPPING （不是特别理解，设计原因，也不清楚，硬件是如何使用INTX，以及软件是如何分配IRQ）
将中断分散到到所有中断线，以防集中在INTA的情况
MAPPING以DEVICE ID为条件
INT COLLAPSING （BRIDGE的功能）
类似模拟INTX的OR的属性
保证连续的两次ASSERT OR DESSERT INTX只发一次
